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Some things to try with the FRDM-KE04Z board as a debug target:
CPU Registers (when halted):
| ARMv6M | System Control Block | |
|---|---|---|
| ACTLR | Auxiliary Control Register | |
| CPUID | CPUID Base Register | |
| ICSR | Interrupt Control State Register | |
| VTOR | Vector Table Offset Register | |
| AIRCR | Application Interrupt and Reset Control Register | |
| SCR | Optional System Control Register | |
| CCR | Configuration and Control Register | |
| SHPR2 | System Handler Priority Register 2 | |
| SHPR3 | System Handler Priority Register 3 | |
| SHCSR | System Handler Control and State Register | |
| DFSR | Debug Fault Status Register | |
| ARMv6M | Debug Control Block | |
| DHCSR | Debug Halting Control And Status Register | |
| DCRSR | Debug Core Register Selector Register | |
| DCRDR | Debug Core Register Data Register | |
| DEMCR | Debug Exception and Monitor Control Register | |
| ARMv6M | Data Watchpoint and Trace | |
| DWT_CTRL | Control register | |
| DWT_PCSR | Program Counter Sample Register | |
| DWT_COMPx | Comparator registers | |
| DWT_MASKx | Comparator Mask registers | |
| DWT_FUNCTIONx | Comparator Function registers | |
| ARMv6M | Breakpoint Unit | |
| BP_CTRL | Breakpoint Control register | |
| BP_COMPx | Breakpoint Comparator registers | |
| ARMv6M | System Timer | |
| SYST_CSR | SysTick Control and Status Register | |
| SYST_RVR | SysTick Reload Value Register | |
| SYST_CVR | SysTick Current Value Register | |
| SYST_CALIB | SysTick Calibration Value Register | |
| ARMv6M | Nested Vectored Interrupt Controller | |
| NVIC_ISER | Interrupt Set-Enable Register | |
| NVIC_ICER | Interrupt Clear-Enable Register | |
| NVIC_ISPR | Interrupt Set-Pending Register | |
| NVIC_ICPR | Interrupt Clear-Pending Register | |
| NVIC_IPRn | Interrupt Priority Registers | |
| MPU_TYPE | MPU Type Register | |
| MPU_CTRL | MPU Control Register | |
| MPU_RNR | MPU Region Number Register | |
| MPU_RBAR | MPU Region Base Address Register | |
| MPU_RASR | MPU Region Attribute and Size Register | |
| Freescale KE04 | System Integration Module | |
| SIM_SRSID | System Reset Status and ID Register | |
| SIM_SOPT | System Options Register | |
| SIM_PINSEL | Pin Selection Register | |
| SIM_SCGC | System Clock Gating Control Register | |
| SIM_UUIDL | Universally Unique Identifier Low Register | |
| SIM_UUIDML | Universally Unique Identifier Middle Low Register | |
| SIM_UUIDMH | Universally Unique Identifier Middle High Register | |
| SIM_CLKDIV | Clock Divider Register | |
| Freescale KE04 | Port Control | |
| PORT_IOFLT | Port Filter Register | |
| PORT_PUEL | Port Pullup Enable Low Register | |
| PORT_HDRIVE | Port high drive enable register | |
| Freescale KE04 | General-Purpose Inout/Output | |
| GPIOA_PDOR | Port Data Output Register | |
| GPIOA_PSOR | Port Set Output Register |
|
| GPIOA_PCOR | Port Clear Output Register |
|
| GPIOA_PTOR | Port Toggle Output Register D7 D6 D5 D4 D3 D2 D1 D0 C7 C6 C5 C4 C3 C2 C1 C0 B7 B6 B5 B4 B3 B2 B1 B0 A7 A6 A5 A4 A3 A2 A1 A0 | |
| GPIOA_PDIR | Port Data Input Register | |
| GPIOA_PDDR | Port Data Direction Register | |
| GPIOA_PIDR | Port Input Disable Register | |
| FGPIOA_PDOR | Fast Port Data Output Register | |
| FGPIOA_PSOR | Fast Port Set Output Register | |
| FGPIOA_PCOR | Fast Port Clear Output Register | |
| FGPIOA_PTOR | Fast Port Toggle Output Register | |
| FGPIOA_PDIR | Fast Port Data Input Register | |
| FGPIOA_PDDR | Fast Port Data Direction Register | |
| FGPIOA_PIDR | Fast Port Input Disable Register |