Quantasm Floating Point Library ($99.95, $199.95 w/src)

The Quantasm Floating Point Library (QFPL) is an assembly language library for performing floating point operations without a FPU -- ideal for embedded systems using a 386 or below. QFPL contains single and double precision floating point routines to add real number capabilities to your assembly language programs, or to replace the slower, bulkier C library routines.

The routines have been designed to be extremely fast and compact, and fully compatible with the 80x87 processor data format. QFPL uses the IEEE floating point data format, as do the 80x87 processors.

The QFPL routines achieve about 7 digits of precision for 4 byte reals and 15 digits of precision for 8 byte reals. Most C floating point libraries are ineffiecient and bulky. Our code is much faster, much smaller and easier to use from assembly language programs.

Here is an example program:

         
.model small
include fp4macro.inc
.stack
.code
EXTRN fp4_add           : proc
EXTRN fp4_asc_convert   : proc
EXTRN fp_to_ascii       : proc
   mov   ax, @data            ; setup segment registers
   mov   ds, ax
   mov   es, ax
   _fp4_load_r1   [real_x]    ; r1 = real_x
   _fp4_load_r2   [real_y]    ; r2 = real_y
   call  fp4_add              ; r1 = r1 + r2
   mov   di, offset str       ; output buffer for ASCII result
   mov   bx, offset fp4_asc_convert
   mov   ch, fp_best_format   ; request best format
   mov   cl, 7                ; 7 digits
   call  fp_to_ascii
   mov   bx, 1                ; stdout
   mov   cx, ax               ; length to output
   mov   dx, di               ; ptr to output string
   mov   ah, 40h              ; write to stdout
   int   21h
   mov   ah, 4ch              ; terminate
   int   21h
.data
real_x      dd 1.0
real_y      dd 2.0
str         db 10 dup(0)
end

List of available functions and macros

FP4_ADD                FP8_ADD                _FP4_ABS
FP4_ASC_CONVERT        FP8_ASC_CONVERT        _FP4_ASSIGN
FP4_ASCII_TO_FP        FP8_ASCII_TO_FP        _FP4_LOAD_R1
FP4_CMP                FP8_CMP                _FP4_LOAD_R1_ES
FP4_DIV                FP8_DIV                _FP4_LOAD_R2
FP4_DWORD_TO_FP        FP8_DWORD_TO_FP        _FP4_LOAD_R2_ES
FP4_INT_TO_FP          FP8_INT_TO_FP          _FP4_NEG
FP4_LONG_TO_FP         FP8_LONG_TO_FP         _FP4_SIGN
FP4_MUL                FP8_MUL                _FP4_STORE_R1
FP4_MUL_10             FP8_MUL_10             _FP4_STORE_R2
FP4_POWEROFTEN         FP8_POWEROFTEN         _FP8_ABS
FP4_SET_ERROR          FP8_SET_ERROR          _FP8_ASSIGN
FP4_SUB                FP8_SUB                _FP8_LOAD
FP4_TO_ASCII           FP8_TO_ASCII           _FP8_LOAD_ES
FP4_TO_DWORD           FP8_TO_DWORD           _FP8_NEG
FP4_TO_FP8             FP8_TO_FP4             _FP8_SIGN
FP4_TO_INT             FP8_TO_INT             _FP8_STORE
FP4_TO_LONG            FP8_TO_LONG            FP_CLEAR_ERROR
FP4_TO_WORD            FP8_TO_WORD            FP_GET_ERROR
FP4_WORD_TO_FP         FP8_WORD_TO_FP         FP_SET_ERROR
                                              FP_TO_ASCII

Key:

  FP4_  single precision function     _FP4_ single precision macro
  FP8_  double precision function     _FP8_ double precision macro
  FP_   single or double precision use

Code Size

                          QFPL    QFPL 8   MSC 7.0  Borland C++
add                        256      520      17.5K    16.2K
add/sub/mult/div           530      880      17.5K    16.2K
to ascii/add/sub/mult/div  1300    1800      20.5K    16.3K

Speed in micro seconds

      single precision              double precision

      QFPL  MSC 7.0  Bor C++       QFPL    MSC 7.0  Bor C++
add    8.5     78       82           33      85       88
sub    11      81       85           34      87       91
mult   12      87       93           71      96       99
divide 36      95       85           131     109      95

timings are average speed on a 25MHz 80386, real mode
(for protected mode, QFPL is the same. C compilers have an additional 25% - 50% overhead)